{"id":260869,"date":"2025-02-02T11:18:54","date_gmt":"2025-02-02T10:18:54","guid":{"rendered":"https:\/\/glosarix.com\/glossary\/network-on-chip-noc-en\/"},"modified":"2025-02-02T11:18:54","modified_gmt":"2025-02-02T10:18:54","slug":"network-on-chip-noc-en","status":"publish","type":"glossary","link":"https:\/\/glosarix.com\/en\/glossary\/network-on-chip-noc-en\/","title":{"rendered":"Network on Chip (NoC)"},"content":{"rendered":"<p>Description: The network on chip (NoC) is a communication subsystem within an integrated circuit that connects various components, such as processors, memory, and other functional modules. Its design is based on the idea that, like computer networks, an efficient topology can be established for data transmission within a chip. NoCs allow for scalable and flexible communication, which is essential in complex systems where multiple cores or processing units must interact effectively. Unlike traditional buses, which can become bottlenecks as the number of components increases, NoCs use multiple communication channels that can operate simultaneously, thereby improving overall system performance. Additionally, NoCs can be configured to support different communication protocols, making them versatile for various applications. In the context of integrated circuits in general, NoCs are particularly relevant as they enable designers to implement custom architectures that optimize communication between processing units, facilitating the development of more complex and efficient systems.<\/p>\n<p>History: The network on chip (NoC) began to be developed in the late 1990s in response to the limitations of traditional buses in integrated systems. In 1996, the concept was first formalized in an academic paper by Dr. Giovanni De Micheli and his team, who proposed a network architecture to improve communication in multi-core chips. Since then, research in NoCs has grown exponentially, driven by the need to handle the increasing complexity of integrated circuits and the demand for higher performance in computing applications.<\/p>\n<p>Uses: Network on chips are primarily used in system-on-chip (SoC) designs and multi-core processor architectures, where efficient communication between multiple units is crucial. They are also applied in high-performance devices, such as servers and workstations, where effective handling of large data volumes is required. Additionally, NoCs are used in artificial intelligence and signal processing applications, where speed and efficiency are paramount.<\/p>\n<p>Examples: A practical example of a network on chip can be found in Intel Xeon processors, which use NoCs to manage communication between multiple cores. Another case is the Tilera TILE64 processor, which implements a NoC architecture to facilitate communication among its processing cores. Additionally, in the FPGA domain, companies like Xilinx have developed solutions that integrate NoCs to optimize the performance of their programmable devices.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Description: The network on chip (NoC) is a communication subsystem within an integrated circuit that connects various components, such as processors, memory, and other functional modules. Its design is based on the idea that, like computer networks, an efficient topology can be established for data transmission within a chip. NoCs allow for scalable and flexible [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"menu_order":0,"comment_status":"open","ping_status":"open","template":"","meta":{"footnotes":""},"glossary-categories":[12250],"glossary-tags":[13206],"glossary-languages":[],"class_list":["post-260869","glossary","type-glossary","status-publish","hentry","glossary-categories-fpga-en","glossary-tags-fpga-en"],"post_title":"Network on Chip (NoC) ","post_content":"Description: The network on chip (NoC) is a communication subsystem within an integrated circuit that connects various components, such as processors, memory, and other functional modules. Its design is based on the idea that, like computer networks, an efficient topology can be established for data transmission within a chip. NoCs allow for scalable and flexible communication, which is essential in complex systems where multiple cores or processing units must interact effectively. Unlike traditional buses, which can become bottlenecks as the number of components increases, NoCs use multiple communication channels that can operate simultaneously, thereby improving overall system performance. Additionally, NoCs can be configured to support different communication protocols, making them versatile for various applications. In the context of integrated circuits in general, NoCs are particularly relevant as they enable designers to implement custom architectures that optimize communication between processing units, facilitating the development of more complex and efficient systems.\n\nHistory: The network on chip (NoC) began to be developed in the late 1990s in response to the limitations of traditional buses in integrated systems. In 1996, the concept was first formalized in an academic paper by Dr. Giovanni De Micheli and his team, who proposed a network architecture to improve communication in multi-core chips. Since then, research in NoCs has grown exponentially, driven by the need to handle the increasing complexity of integrated circuits and the demand for higher performance in computing applications.\n\nUses: Network on chips are primarily used in system-on-chip (SoC) designs and multi-core processor architectures, where efficient communication between multiple units is crucial. They are also applied in high-performance devices, such as servers and workstations, where effective handling of large data volumes is required. Additionally, NoCs are used in artificial intelligence and signal processing applications, where speed and efficiency are paramount.\n\nExamples: A practical example of a network on chip can be found in Intel Xeon processors, which use NoCs to manage communication between multiple cores. Another case is the Tilera TILE64 processor, which implements a NoC architecture to facilitate communication among its processing cores. Additionally, in the FPGA domain, companies like Xilinx have developed solutions that integrate NoCs to optimize the performance of their programmable devices.","yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v25.5 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Network on Chip (NoC) - Glosarix<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/glosarix.com\/en\/glossary\/network-on-chip-noc-en\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Network on Chip (NoC) - Glosarix\" \/>\n<meta property=\"og:description\" content=\"Description: The network on chip (NoC) is a communication subsystem within an integrated circuit that connects various components, such as processors, memory, and other functional modules. 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Its design is based on the idea that, like computer networks, an efficient topology can be established for data transmission within a chip. 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